UTM Scholar : PROF. Dr. MOHAMED KHALIL BIN MOHD HANI

GRANT(PI & MEMBERS)

29

PUBLICATIONS

59

INDEXED PUBLICATION

46

TOTAL STUDENTS

H-INDEXED (SCOPUS)

CITATIONS (SCOPUS)

Grant (PI)

INDUSTRY GRANTS

INTERNATIONAL GRANTS

NATIONAL GRANTS

UNIVERSITY FUND

TOTAL

Publications

INDEXED PUBLICATION

NON-INDEXED PUBLICATION

OTHERS PUBLICATION

TOTAL

Supervisions

MASTER

PHD

TOTAL

Legend : SPONSOR TYPE OF GRANT

Grant Name	Year
A Novel and Smart Arrhythmia Analyzer Design based on Enhanced Artificial Intelligence Algorithm for Cardiac Home Monitoring MINISTRY OF EDUCATION Transdiscplinary Research Grant Scheme	2016
MY-TELECARDIOLOGY: A WEB-BASED TELECARDIOLOGY FRAMEWORK FOR CARDIAC DISEASE PREVENTION AND MONITORING IN MALAYSIA COMMUNITY RUG OF UTM Tier 1	2015
FPGA System-on-Chip Implementation of Advanced Face Recognition Technology for Biometric Verification and Identification at Airports MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund	2015
Novel Dataflow Actor Network Partitioning Algorithms for Multiple FPGAs Systems Implementation MINISTRY OF EDUCATION Fundamental Research Grant Scheme	2014
Fast SoC Prototyping Using Low Latency Hybrid Virtual Platform COLLABORATIVE RESEARCH IN ENGINEERING, SCIENCE & TECHNOLOGY CENTER (CREST) Non Goverment Agency	2014
Quantum Neural Network Models for Pattern Recognition using FPGA Hardware Emulation MINISTRY OF EDUCATION Fundamental Research Grant Scheme	2014
A NETFPGA BASED RECONFIGURABLE MIDDLEBOX FOR QUALITY-OF-SERVICE NETWORK TRAFFIC MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund	2014
A Design Framework for Multi-Processor System-on-Chip (MPSoC)Architecture Design-Space Exploration in Biomedical Application: Human Heart ECG Monitoring and Processing MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund	2013
A Real - Time, Intelligent In - Vehicle Driver Drowsiness Detection Device Based On An Embedded System - On - Chip (SOC) In FPGA Microchip Technology MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund	2011
FPGA-Based Secure Embedded System For Personel Authentication Using Finger Vein Biometrics MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund	2011
EMBEDDED MULTIMODAL FINGERVEIN-FINGERPRINT BIOMETRIC SYSTEM IN FPGA HARDWARE RUG OF UTM Tier 1	2011
Hardware Security Module (HSM) and Trusted Computing Platform for Next-Generation E-Security MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Technofund	2007
CAD Algorithm & Architecture in Physical Design System for Nano-scale VLSI integrated Circuits MINISTRY OF EDUCATION Fundamental Research Grant Scheme	2007
Embedded Soc-Based Hardware Integration Of Compression-Encryption-Authentication For Data Security Of Networked Multi-Gigabyte Databases. MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund	2006
Advanced EDA/CAD Algorithms & Technique for Deep-Submicron IC Design Non Goverment Agency	2001
Design of RSA Crypto Coprocessor for Smart Card Microchip Contract	2001
System-on-chip (SoC) Design of an Intelligent Network Processor Microchip with Data Security Features Sciencefund	1998
Reconfigurable Neural Processor Core INTEL TECHNOLOGY SDN. BHD. Contract	1996
Public Key Crytosystem Hardware and Software Contract	1996
Design of a Mixed-Mode, Testable VLSI Neuroprocessor Chip, With Built-in Current Test Sensor Structure, to be Applied in Computer Networking Hardware MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund	1996
ASIC Design in Digital Multimedia Hardware INTEL TECHNOLOGY SDN. BHD. Contract	1995
Real Time Implementation of Image /Video Compression Algorithm Using FPGA Short Term	1995
Pengujian Litar Bersepadu INTEL TECHNOLOGY SDN. BHD. Contract	1994
Mikorpemprosesan Dan Pemprosesan Isyarat Digit (DSP) Contract	1994
Development Of Multimedia Applications And Support Hardware For High Speed Networks MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund	1993
Development of Hardware and Software Analyses for Local Area Network Managements and Network Troubleshooting Short Term	1993
Development of PC-based Telephone Answering System. Short Term	1992
Development of Multimedia Application Sofrware and Multimedia Courseware for Faculty of Electrical Engineering Short Term	1992
Development and Appplication of Artificial Intelligence (AI) in Product Diagnostics, Equipment Maintenance and Scheduling in a Semiconductor Manufacturing Plant Short Term	1992

Legend : PUBLICATION CATEGORY TYPE OF AUTHORS

Publication Name	Year
Accurate And Compact Convolutional Neural Network Based On Stochastic Computing NEUROCOMPUTING Publication In Web Of Science UTM FIRST AUTHOR	2022
A Low-Complexity Complex-Valued Activation Function For Fast And Accurate Spectral Domain Convolutional Neural Network INDONESIAN JOURNAL OF ELECTRICAL ENGINEERING AND INFORMATICS Publication In Scopus CO-AUTHOR	2021
Low-Area And Accurate Inner Product And Digital Filters Based On Stochastic Computing SIGNAL PROCESSING Publication In Web Of Science UTM FIRST AUTHOR	2021
Characterization Of Correlation In Stochastic Computing Functions 2ND INTERNATIONAL CONFERENCE ON ELECTRICAL, COMMUNICATION AND COMPUTER ENGINEERING Publication In Scopus UTM FIRST AUTHOR	2020
Spectral-Based Convolutional Neural Network Without Multiple Spatial-Frequency Domain Switchings NEUROCOMPUTING Publication In Web Of Science UTM FIRST AUTHOR	2019
Accurate And Compact Stochastic Computations By Exploiting Correlation TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES Publication In Web Of Science UTM FIRST AUTHOR	2019
Paroxysmal Atrial Fibrillation Prediction Based On Hrv Analysis And Non-Dominated Sorting Genetic Algorithm Iii COMPUTER METHODS AND PROGRAMS IN BIOMEDICINE Publication In Web Of Science UTM FIRST AUTHOR	2018
Stochastic Computing Correlation Utilization In Convolutional Neural Network Basic Functions TELKOMNIKA (TELECOMMUNICATION, COMPUTING, ELECTRONICS AND CONTROL) Publication In Scopus UTM FIRST AUTHOR	2018
Algorithm To Convert Signal Interpreted Petri Net Models To Programmable Logic Controller Ladder Logic Diagram Models INDONESIAN JOURNAL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE Publication In Scopus CO-AUTHOR	2018
Improved Quantum Circuit Modelling Based On Heisenberg Representation QUANTUM INFORMATION PROCESSING Publication In Web Of Science UTM FIRST AUTHOR	2018
Optimizing Fpga-Based Cnn Accelerator For Energy Efficiency With An Extended Roofline Model TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES Publication In Web Of Science UTM FIRST AUTHOR	2018
An Fpga-Based Quantum Circuit Emulation Framework Using Heisenberg Representation INTERNATIONAL JOURNAL OF QUANTUM INFORMATION Publication In Web Of Science UTM FIRST AUTHOR	2018
A Real-Time Near Infrared Image Acquisition System Based On Image Quality Assessment JOURNAL OF REAL-TIME IMAGE PROCESSING Publication In Web Of Science UTM FIRST AUTHOR	2017
Hardware Software Co-Simulation Of Skin Color Detection Algorithm RECENT ADVANCES IN HARDWARE SOFTWARE CO DESIGN AND PATTERN RECOGNITION Book Chapter CORRESPONDING AUTHOR	2017
Hardware Software Co-Design Of 2d Convolution System RECENT ADVANCES IN HARDWARE SOFTWARE CO DESIGN AND PATTERN RECOGNITION Book Chapter UTM FIRST AUTHOR	2017
An Optimized Buffer Insertion Algorithm With Delay-Power Constraints For Vlsi Layouts TURKISH JOURNAL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCES Publication In Scopus CO-AUTHOR	2017
Introduction To Quantum Computing RECENT ADVANCES IN HARDWARE SOFTWARE CO DESIGN AND PATTERN RECOGNITION Book Chapter CORRESPONDING AUTHOR	2017
Digital Recognition Using Convolutional Neural Network RECENT ADVANCES IN HARDWARE SOFTWARE CO DESIGN AND PATTERN RECOGNITION Book Chapter CORRESPONDING AUTHOR	2017
Distributed B-Sdlm: Accelerating The Training Convergence Of Deep Neural Networks Through Parallelism LECTURE NOTES IN COMPUTER SCIENCE (INCLUDING SUBSERIES LECTURE NOTES IN ARTIFICIAL INTELLIGENCE AND LECTURE NOTES IN BIOINFORMATICS) Publication In Scopus UTM FIRST AUTHOR	2016
Bounded Activation Functions For Enhanced Training Stability Of Deep Neural Networks On Visual Pattern Recognition Problems NEUROCOMPUTING Publication In Web Of Science UTM FIRST AUTHOR	2016
Finger-Vein Biometric Identification Using Convolutional Neural Network TURKISH JOURNAL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCES Publication In Web Of Science UTM FIRST AUTHOR	2016
Paroxysmal Atrial Fibrillation Prediction Method With Shorter Hrv Sequences COMPUTER METHODS AND PROGRAMS IN BIOMEDICINE Publication In Web Of Science UTM FIRST AUTHOR	2016
An Fpga-Based Quantum Computing Emulation Framework Based On Serial-Parallel Architecture INTERNATIONAL JOURNAL OF RECONFIGURABLE COMPUTING Publication In Web Of Science UTM FIRST AUTHOR	2016
Gender ClassiCation: A Convolutional Neural Network Approach TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES Publication In Web Of Science UTM FIRST AUTHOR	2016
An Optimized Second Order Stochastic Learning Algorithm For Neural Network Training NEUROCOMPUTING Publication In Web Of Science UTM FIRST AUTHOR	2016
Hardware Acceleration Of A Face Detection System On Fpga IEEE STUDENT CONF. ON RESEARCH AND DEVELOPMENT SCORED 2015 Publication In Scopus UTM FIRST AUTHOR	2016
Dynamic Power Dissipation Formulation For Application In Dynamic Programming Buffer Insertion Algorithm JURNAL TEKNOLOGI (SCIENCES & ENGINEERING) Publication In Scopus CO-AUTHOR	2016
Ventricular Tachyarrhythmia Onset Prediction Based On Hrv And Genetic Algorithm TELKOMNIKA (TELECOMMUNICATION COMPUTING ELECTRONICS AND CONTROL) Publication In Scopus CO-AUTHOR	2016
An Optimized Second Order Stochastic Learning Algorithm For Neural Network Training LECTURE NOTES IN COMPUTER SCIENCE Publication In Web Of Science UTM FIRST AUTHOR	2015
Sleep Apnea Event Detection System Based On Heart Rate Variability Analysis THE SECOND INTERNATIONAL CONFERENCE ON ADVANCED DATA AND INFORMATION ENGINEERING Conference Paper UTM FIRST AUTHOR	2015
Generalizing Convolutional Neural Networks For Pattern Recognition Tasks ARPN JOURNAL OF ENGINEERING AND APPLIED SCIENCES Publication In Scopus UTM FIRST AUTHOR	2015
Convolutional Neural Networks With Fused Layers Applied To Face Recognition INTERNATIONAL JOURNAL OF COMPUTATIONAL INTELLIGENCE AND APPLICATIONS Publication In Scopus UTM FIRST AUTHOR	2015
Microprocessor-Based Athlete Health Monitoring Device Based On Heart Rate And Stride Length Calculation JURNAL TEKNOLOGI (D): SPECIAL ISSUE - MEDICAL SIGNAL AND IMAGES PROCESSING TECHNOLOGY Publication In Scopus UTM FIRST AUTHOR	2015
An Accurate Fpga-Based Hardware Emulation On Quantum Fourier Transform 13TH AUSTRALASIAN SYMPOSIUM ON PARALLEL AND DISTRIBUTED COMPUTING (AUSPDC 2015) Publication In Scopus UTM FIRST AUTHOR	2015
A-Sdlm: An Asynchronous Stochastic Learning Algorithm For Fast Distributed Learning 13TH AUSTRALASIAN SYMPOSIUM ON PARALLEL AND DISTRIBUTED COMPUTING (AUSPDC 2015) Publication In Scopus UTM FIRST AUTHOR	2015
Convolutional Neural Network For Face Recognition With Pose And Illumination Variation INTERNATIONAL JOURNAL OF ENGINEERING AND TECHNOLOGY Publication In Scopus UTM FIRST AUTHOR	2014
An Optimization Algorithm For Simultaneous Routing And Buffer Insertion With Delay-Power Constraints In Vlsi Layout Design 15TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, ISQED 2014 Publication In Scopus CO-AUTHOR	2014
Hardware Implementation Of Evolvable Block-Based Neural Networks Utilizing A Cost Efficient Sigmoid-Like Activation Function NEUROCOMPUTING Publication In Web Of Science UTM FIRST AUTHOR	2014
Optimization Of Structure And System Latency In Evolvable Block-Based Neural Networks Using Genetic Algorithm NEUROCOMPUTING Publication In Web Of Science UTM FIRST AUTHOR	2014
Hw/Sw Co-Design Of Reconfigurable Hardware-Based Genetic Algorithm In Fpgas Applicable To A Variety Of Problems COMPUTING Publication In Web Of Science UTM FIRST AUTHOR	2013
Biometric Encryption Based On A Fuzzy Vault Scheme With A Fast Chaff Generation Algorithm FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF GRID COMPUTING AND ESCIENCE Publication In Web Of Science CORRESPONDING AUTHOR	2013
Self-Learning Vs Guided Learning:A Case Study NATIONAL STUDENT DEVELOPMENT CONFERENCE (NASDEC 2013) Conference Paper CO-AUTHOR	2013
Parameterizable Decision Tree Classifier On Netfpga ADVANCES IN INTELLIGENT SYSTEMS AND COMPUTING Publication In Web Of Science CO-AUTHOR	2013
S.Rabila2: An Optimal Vlsi Routing Algorithm With Buffer Insertion Using Iterative Rlc Model ICCAS 2012 - 2012 IEEE INTERNATIONAL CONFERENCE ON CIRCUITS AND SYSTEMS: "ADVANCED CIRCUITS AND SYSTEMS FOR SUSTAINABILITY" Publication In Scopus CO-AUTHOR	2012
A Two-Step Binary Particle Swarm Optimization Approach For Routing In Vlsi ICIC EXPRESS LETTERS (ICIC-EL) Publication In Scopus CO-AUTHOR	2012
Ga-Based Parameter Tuning In Finger-Vein Biometric Security Embedded System Proceedings of the First IEEE International Conference on Communications in China: Communications Theory and Security (CTS 2012), Publication In Scopus CORRESPONDING AUTHOR	2012
Evolvable Block-Based Neural Networks For Real-Time Classification Of Heart Arrhythmia From Ecg Signals Proceedings of the 2012 IEEE EMBS International Conference on Biomedical Engineering and Sciences (IECBES 2012) Publication In Scopus UTM FIRST AUTHOR	2012
Evolvable Block-Based Neural Networks For Classification Of Driver Drowsiness Based On Heart Rate Variability Proceedings of the 2012 IEEE International Conference on Circuits and Systems (ICCAS 2012) Publication In Scopus UTM FIRST AUTHOR	2012
A Network-On-Chip Simulation Framework For Homogeneous Multi-Processor System-On-Chip PROCEEDINGS OF INTERNATIONAL CONFERENCE ON ASIC Publication In Scopus CO-AUTHOR	2011
Systemc-Based Hardware/Software Co-Design Of Elliptic Curve Cryptographic System For Network Mutual Authentication Malaysian Journal of Computer Science Publication In Scopus UTM FIRST AUTHOR	2011
Codesl: A Framework For System Level Modelling, Co-Simulating And Design-Space Exploration Of Embedded Systems Based On System-On-Chip INTERNATIONAL CONFERENCE ON INTELLIGENT SYSTEMS, MODELLING AND SIMULATION 2010 (ISMS 2010) Publication In Scopus CO-AUTHOR	2010
Hardware Acceleration Of Openssl Cryptographic Functions For High-Performance Internet Security ISMS 2010 - UKSIM/AMSS 1ST INTERNATIONAL CONFERENCE ON INTELLIGENT SYSTEMS, MODELLING AND SIMULATION Publication In Web Of Science CORRESPONDING AUTHOR	2010
A Tightly Coupled Hardware For Fpga-Based Embedded Elliptic Curve Cryptosystem In Gf(2m) International Graduate Conference on Engineering and Science (IGCES) 2008 Conference Paper INDIVIDUAL AUTHOR	2008
System Level Modelling Of Compressed Memory Architecture Using Systemc Proceedings of the International Conference on Robotics,Vision, Information and Signal Processing,ROVISP'08 Conference Paper INDIVIDUAL AUTHOR	2007
Embedded Cryptosystem For Strong Data Security In Telemedicine International Conference on Robotic, Vision, Information and Signal Processing (ROVISP 2007) Conference Paper INDIVIDUAL AUTHOR	2007
Cryptographic Hardware Implementation In An Ip-Based System-On-Chip(Soc) IP Based Electronic System Conference & Exhibition Conference Paper INDIVIDUAL AUTHOR	2007
Electronic System Level (Esl) Design Methodology For Ip-Based System-On-Chip (Soc) International Conference on Robotic, Vision, Information and Signal Processing (ROVISP 2007) Conference Paper INDIVIDUAL AUTHOR	2007
Optimal Routing Algorithm For Minimizing Interconnect Delay In Vlsi Layout Design Int. Conf. on Robotic, Vision, Information and Signal Processing (ROVISP 2007) Conference Paper INDIVIDUAL AUTHOR	2007
A Cryptographic Service Provider (Csp) For An Fpga-Based Cryptohardware System Regional Conference on Computational Science and Technology (RCCT-2007) Conference Paper INDIVIDUAL AUTHOR	2007

Legend : IP CATEGORY IP LEVEL

Intellectual Property Name	Grant Register No.	IP Level	IP Category
CRYPTO SYSTEM-ON-CHIP ARCHITECTURE IN A HARDWARE SECURITY MODULE FOR INFORMATION SECURITY	MY-158355-A	NATIONAL	PATENT
FINGE-VEIN BIOMETRICS FOR SECURE ACCESS CONTROL OF BANK SAFE-DEPOSIT BOXES		NATIONAL	PATENT
EMBEDDED SOC-BASED HARDWARE INTEGRATED OF COMPRESSION-ENCRYPTION-AUNTHENTICATION FOR DATA SECURITY OF NETWORKED MULTI-GIGABYTE DATABASES		NATIONAL	PATENT

Legend : SESSION LEVEL OF STUDY STATUS SUPERVISION LEVEL

Supervision List
NAZAR ELFADIL M A ELGAZOLI PHD ON GOING SUPERVISOR
SHAIKH NASIR @ NASIR BIN SHAIKH HUSIN OPTIMIZATION OF ROUTING ALGORITHM FOR INTERCONNECT DELAY IN ULTRA LARGE SCALE INTEGRATION DESIGNS PHD GRADUATED SUPERVISOR 2008
HAU YUAN WEN SYSTEMC - BASED DESIGN FRAMEWORK FOR AN EMBEDDED SYSTEM IMPLEMENTED AS SYSTEM-ON-CHIP PHD GRADUATED SUPERVISOR 2009
RABIA BAKHTERI D/O JAHANGIR BAKHTERI A BIOMETRIC ENCRYPTION SYSTEM ALGORITHM DEVELOPMENT AND SYSTEM LEVEL DESIGN PHD GRADUATED SUPERVISOR 2011
VISHNU A/L PARAMASIVAM AN EVOLVABLE BLOCK-BASED NEURAL NETWORK ARCHITECTURE FOR EMBEDDED HARDWARE PHD GRADUATED SUPERVISOR 2013
SYAFEEZA BINTI AHMAD RADZI CONVOLUTIONAL NEURAL NETWORKS FOR FACE RECOGNITION AND FINGER-VEIN BIOMETRIC IDENTIFICATION PHD GRADUATED SUPERVISOR 2014
LIEW SHAN SUNG AN EFFICIENT AND EFFECTIVE CONVOLUTIONAL NEURAL NETWORK FOR VISUAL PATTERN RECOGNITION PHD GRADUATED SUPERVISOR 2016
BOON KHANG HUA AN OPTIMIZATION METHOD BASED ON GENETIC ALGORITHM FOR HEART RATE VARIABILITY ANALYSIS IN THE PREDICTION OF THE ONSET OF CARDIAC ARRHYTHMIA PHD GRADUATED SUPERVISOR 2017
LEE YEE HUI QUANTUM COMPUTING MODELLING ON FIELD PROGRAMMABLE GATE ARRAY BASED ON STATE VECTOR AND HEISENBERG MODELS PHD GRADUATED SUPERVISOR 2017
ZULFAKAR BIN ASPAR PETRI NET MODELLING OF PROGRAMMABLE LOGIC CONTROLLER PHD GRADUATED SUPERVISOR 2017
HAMDAN USAMAH HAMDAN ABDELLATEF STOCHASTIC COMPUTING SYSTEM HARDWARE DESIGN FOR CONVOLUTIONAL NEURAL NETWORKS OPTIMIZED FOR ACCURACY, AREA AND ENERGY EFFICIENCY PHD GRADUATED SUPERVISOR 2019
SAYED OMID AYAT ENERGY-EFFICIENT SPECTRAL CONVOLUTIONAL NEURAL NETWORK ACCELERATOR ON FIELD-PROGRAMMABLE GATE ARRAY PHD GRADUATED SUPERVISOR 2019
CHONG WEI SHENG DESIGN OF A HASH PROCESSOR CHIP AND THE EMPLEMENTATION OF A DIGITAL SIGNATURE SUBSYSTEM FOR DATA SECURITY MASTER GRADUATED SUPERVISOR 2002
TEOH GIAP SENG MASTER ON GOING SUPERVISOR
SURESH BABU A/L SUBRAMANIAM MASTER ON GOING SUPERVISOR
CHEANG CHOEN HOE MASTER ON GOING SUPERVISOR
YEEM KAH MENG MASTER END OF STUDY PERIOD SUPERVISOR
TEH J-WING MASTER GRADUATED SUPERVISOR 2004
LIM KIE WOON MASTER GRADUATED SUPERVISOR 2004
AVINASH A/L RAJAH VLSI OF A NEUROHARDWARE PROCESSOR IMPLEMENTING THE KOHONEN NEURAL NETWORK ALGORITHM MASTER GRADUATED SUPERVISOR 2005
SYAFEEZA BINTI AHMAD RADZI CONVOLUTIONAL NEURAL NETWORKS FOR FACE RECOGNITION AND FINGER-VEIN BIOMETRIC IDENTIFICATION MASTER GRADUATED SUPERVISOR 2005
HAU YUAN WEN SYSTEMC - BASED DESIGN FRAMEWORK FOR AN EMBEDDED SYSTEM IMPLEMENTED AS SYSTEM-ON-CHIP MASTER GRADUATED SUPERVISOR 2005
ARUL A/L PANIANDI A HARDWARE IMPLEMENTATION OF RIVEST-SHAMIR-ADLEMAN CO-PROCESSOR FOR RESOURCE CONSTRAINED EMBEDDED SYSTEMS MASTER GRADUATED SUPERVISOR 2006
MOHD IZUAN BIN ISMAIL DESIGN OF AN ADVANCED ENCRYPTION STANDARD CRYPTO - PROCESSOR CORE FOR FIELD PROGRAMMABLE GATE ARRAY IMPLEMENTATION MASTER GRADUATED SUPERVISOR 2006
ILLIASAAK AHMAD A CUSTOMIZABLE CRYPTOGRAPHIC SERVICE PROVIDER FOR AN EMBEDDED CRYPTOHARDWARE SYSTEM MASTER GRADUATED SUPERVISOR 2006
CH'NG HENG SUN A HARDWARE CO-PROCESSOR IN FPGA FOR HIGH SPEED COMPUTATION OF SHORTEST PATH GRAPH ALGORITHM MASTER GRADUATED SUPERVISOR 2007
NORASHIKIN BT M THAMRIN A FIELD PROGRAMMABLE GATE ARRAY-BASED CRYTOGRAPHIC SYSTEM-ON-CHIP MASTER GRADUATED SUPERVISOR 2007
RABIA BAKHTERI D/O JAHANGIR BAKHTERI MASTER GRADUATED SUPERVISOR 2007
CHEW EIK WEE A COMPUTER AIDED DESIGN SOFTWARE MODULE FOR CLOCK TREE SYNTHESIS IN VERY LARGE SCALE INTEGRATION DESIGN MASTER GRADUATED SUPERVISOR 2007
VISHNU A/L PARAMASIVAM MASTER GRADUATED SUPERVISOR 2009
MOHD NAZRIN BIN MOHD YASSIN IMPLEMNTATION OF BIOMETRIC SYSTEMS IN FPGA-BASED HARDWARE PLATFORM. MASTER GRADUATED SUPERVISOR 2009
ARIF IRWANSYAH FPGA IMPLEMENTATION OF ELLIPTIC CURVE CRYPTOGRAPHY OVER GF(P) WITH RESIDUE NUMBER SYSTEMS MASTER GRADUATED SUPERVISOR 2009
ENG PEI CHEE FINGER-VEIN BIOMETRIC AUTHENTICATION IN A SYSTEM-ON-CHIP DESIGN BASED ON FIELD PROGRAMMABLE GATE ARRAYS MASTER GRADUATED SUPERVISOR 2011
LIEW TEK YEE HARDWARE-BASED BIOMETRIC ENCRYPTION IMPLEMENTATION WITH GAUSS-JORDAN ALGORITHM ACCELERATOR CORE IN FIELD PROGRAMMABLE GATE ARRAYS MASTER GRADUATED SUPERVISOR 2011
MOHD ANNUAR BIN SUHAINI FINGER-BASED MULTIMODAL BIOMETRICS SYSTEM IN FIELD PROGRAMMABLE GATE ARRAY MASTER GRADUATED SUPERVISOR 2012
SATHIVELLU A/L BALAKRISHNAN HARDWARE-BASED GENETIC ALGORITHM IMPLEMENTATION IN FIELD PROGRAMMABLE GATE ARRAYS MASTER GRADUATED SUPERVISOR 2012
LEE YEE HUI A QUANTUM COMPUTING MODEL FOR FIELD PROGRAMMABLE GATE ARRAY TECHNOLOGY MASTER GRADUATED SUPERVISOR 2013
MOGANESHWARAN S/O RAJASEGARAN FINGERPRINT-FINGERVEIN MULTIMODAL BIOMETRIC AUTHENTICATION SYSTEM IN FIELD PROGRAMMABLE GATE ARRAY HARDWARE MASTER GRADUATED SUPERVISOR 2013
JOHNNY KONG JAK KAN SOFTWARE AND HARDWARE CO SIMULATION USING SYSTEM VERILOG DPI PLATFORM FOR IMAGE PROCESSING MASTER GRADUATED SUPERVISOR 2013
MOHAMAD AMIN BIN NOORDIN MASTER GRADUATED SUPERVISOR 2015
NGO WAI LOON MASTER GRADUATED SUPERVISOR 2015
WONG XUE YUAN MASTER GRADUATED SUPERVISOR 2015
NUHAIRI BIN ANUAR MASTER GRADUATED SUPERVISOR 2015
VIDYA DHARAN A/L SRI DARAN NAMBIAR A FACE RECOGNITION SYSTEM ACCELERATED ON EMBEDDED GRAPHICS PROCESSING UNIT ENABLED BY COMPUTE UNIFIED DEVICE ARCHITECTURE MASTER GRADUATED SUPERVISOR 2017
YEAP HAN CHIEN FACE DETECTION HARDWARE ACCELERATOR USING C-BASED HIGH-LEVEL SYNTHESIS MASTER GRADUATED SUPERVISOR 2017