PENSYARAH KANAN (DS51)
Grant
Publication
Indexed Publication
H-Index (SCOPUS)
Citations (SCOPUS)
Note: List of all research grants and publications shown are based on data registered in RADIS
mafiq@utm.my
FACULTY OF ENGINEERING
INNOVATIVE ENGINEERING
| # | Grant Name | Year |
|---|---|---|
| 1 | ATOMISTIC MODELLING OF ALUMINIUM DOPED SILICENE CHANNEL FOR FIELD-EFFECT TRANSISTOR CURRENT TRANSPORT RUG OF UTM UTM Fundamental Research |
2020 |
| 2 | Charge-Based Modeling of Gate-All-Around Floating Gate (GAA-FG) with Quantum Effects on Variable Oxide Thickness (VARIOT) Tunnel Layer for Flash Memory Cell Purpose MINISTRY OF EDUCATION Fundamental Research Grant Scheme |
2019 |
| 3 | Charge-Based Compact Modeling of Junctionless Nanowire Transistor with Strain for Low Power Digital Logic Circuits MINISTRY OF EDUCATION Fundamental Research Grant Scheme |
2019 |
| 4 | Analytical Modeling and Simulation of 10 nm Junctionless III-V Semiconductor Nanowire Optimized Using Taguchi Method RUG OF UTM Tier 2 |
2019 |
| 5 | PERFORMANCE ANALYSIS OF SOI-BASED JUNCTIONLESS TRANSISTOR FOR 6T AND 8T SRAM CELLS RUG OF UTM Tier 2 |
2019 |
| 6 | INTERFACE TRAP DENSITY OF JUNCTIONLESS NANOWIRE TRANSISTOR: EXTRACTION AND COMPACT MODELING RUG OF UTM Tier 2 |
2019 |
| 7 | UTM-TDR25.2(T2):ELECTRICAL PERFORMANCE AND RELIABILITY CHARACTERIZATION OF CARBON BASED DEVICE RUG OF UTM UTM Transdiciplinary Research Grant |
2018 |
| # | Publication Name | Year |
|---|---|---|
| 1 |
2d Honeycomb Silicon: A Review On Theoretical Advances For Silicene Field-Effect Transistors CURRENT NANOSCIENCE Publication In Web Of Science CO-AUTHOR |
2020 |
| 2 |
A Review Of The Top Of The Barrier Nanotransistor Models For Semiconductor Nanomaterials SUPERLATTICES AND MICROSTRUCTURES Publication In Web Of Science CO-AUTHOR |
2020 |
| 3 |
Carrier Statistics Of Highly Doped Armchair Graphene Nanoribbons With Edge Disorder SUPERLATTICES AND MICROSTRUCTURES Publication In Web Of Science CO-AUTHOR |
2020 |
| 4 |
Electronic Properties Of Zigzag Silicene Nanoribbons With
Single Vacancy Defect INDONESIAN JOURNAL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE Publication In Scopus CO-AUTHOR |
2020 |
| 5 |
Explicit Continuous Charge-Based Compact Model Of Surrounding Gate Mosfet (Srgmosfet) With Smooth Transition Between Partially-Depleted To Fully-Depleted Operation SEMICONDUCTOR SCIENCE AND TECHNOLOGY Publication In Web Of Science CORRESPONDING AUTHOR |
2020 |
| 6 |
Carrier Transport Of Rough-Edged Doped Gnrfets With Metal Contacts At Various Channel Widths SUPERLATTICES AND MICROSTRUCTURES Publication In Web Of Science CO-AUTHOR |
2020 |
| 7 |
Performance Metrics Of Current Transport In Pristine Graphene
Nanoribbon Field-Effect Transistors Using Recursive Non-Equilibrium GreenãƒÂƒÃ‚ƒÃ‚¢Ã‚€Â™S Function Approach SUPERLATTICES AND MICROSTRUCTURES Publication In Web Of Science CO-AUTHOR |
2020 |
| 8 |
Electronic Properties And Carrier Transport Properties Of Low-Dimensional
Aluminium Doped Silicene Nanostructure PHYSICA E: LOW-DIMENSIONAL SYSTEMS AND NANOSTRUCTURES Publication In Web Of Science CO-AUTHOR |
2020 |
| 9 |
Electronic Properties Of Graphene Nanoribbons With Line-Edge Roughness
Doped With Nitrogen And Boron PHYSICA E: LOW-DIMENSIONAL SYSTEMS AND NANOSTRUCTURES Publication In Web Of Science CO-AUTHOR |
2020 |
| 10 |
Two-Dimensional Modelling Of Uniformly Doped Silicene With Aluminium And Its Electronic Properties ADVANCES IN NANO RESEARCH Publication In Web Of Science CO-AUTHOR |
2020 |
| 11 |
Electronic Properties Of Silicene Nanoribbons Using Tight-Binding Approach 2019 INTERNATIONAL SYMPOSIUM ON ELECTRONICS AND SMART DEVICES (ISESD) Publication In Scopus CO-AUTHOR |
2019 |
| 12 |
Influence Of Single Vacancy Defect At Varying Length On Electronic Properties Of Zigzag Graphene Nanoribbons INDONESIAN JOURNAL OF ELECTRICAL ENGINEERING AND INFORMATICS Publication In Scopus CO-AUTHOR |
2019 |
| 13 |
Reliability Of Graphene As Charge Storage Layer In Floating Gate Flash Memory INDONESIAN JOURNAL OF ELECTRICAL ENGINEERING AND INFORMATICS (IJEEI) Publication In Scopus CO-AUTHOR |
2019 |
| 14 |
Scaling Challenges Of Floating Gate Non-Volatile Memory And Graphene As The Future Flash Memory Device: A Review JOURNAL OF NANOELECTRONICS AND OPTOELECTRONICS Publication In Web Of Science CORRESPONDING AUTHOR |
2019 |
| 15 |
A Carrier Velocity Model For Electrical Detection Of Gas Molecules BEILSTEIN JOURNAL OF NANOTECHNOLOGY Publication In Web Of Science CO-AUTHOR |
2019 |
| 16 |
Explicit Continuous Models Of Drain Current, Terminal Charges And Intrinsic Capacitance For A Long-Channel Junctionless Nanowire Transistor PHYSICA SCRIPTA Publication In Web Of Science CORRESPONDING AUTHOR |
2019 |
| 17 |
Modeling Of Low-Dimensional Pristine And Vacancy Incorporated Graphene Nanoribbons Using Tight Binding Model And Their Electronic Structures ADVANCES IN NANO RESEARCH Publication In Web Of Science CO-AUTHOR |
2019 |
| 18 |
Effect Of Low-K Oxide Thickness Variation On Gate-All-Around Floating Gate With Optimized Sio2/La2o3 Tunnel Barrier
MATERIALS RESEARCH EXPRESS Publication In Web Of Science CO-AUTHOR |
2019 |
| 19 |
Modeling Of Lightly-Doped Drain And Source Contact With Boron And Nitrogen In Graphene Nanoribbon CHINESE JOURNAL OF PHYSICS Publication In Web Of Science CO-AUTHOR |
2019 |
| 20 |
Impact Of Device Parameter Variation On The Electrical Characteristic Of N-Type Junctionless Nanowire Transistor With High-K Dielectrics 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONIC, COMMUNICATION AND CONTROL ENGINEERING 2019 Proceedings CO-AUTHOR |
2019 |
| 21 |
Design Of 6t Sram Cell Using Optimized 20 Nm
Soi Junctionless Transistor
PROCEEDINGS OF THE 2019 IEEE REGIONAL SYMPOSIUM ON MICRO AND NANOELECTRONICS (RSM) Proceedings CO-AUTHOR |
2019 |
| 22 |
Optimization Of High-K Composite Dielectric Materials Of Variable Oxide Thickness Tunnel Barrier For Nonvolatile Memory INDONESIAN JOURNAL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE Publication In Scopus CO-AUTHOR |
2019 |
| 23 |
Electronic Properties Of Zigzag Silicene Nanoribbons With Single Vacancy Defect 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONIC, COMMUNICATION AND CONTROL ENGINEERING 2019 Proceedings CO-AUTHOR |
2019 |
| 24 |
Low-Power And
High Performance
Of An Optimized
Finfet Based 8t
Sram Cell Design PROCEEDINGS OF 6TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING, COMPUTER SCIENCE AND INFORMATICS (EECSI) 2019 Proceedings CO-AUTHOR |
2019 |
| # | Supervision List |
|---|---|
| 1 |
SYAFIZAH AFIDAH BINTI AFFANDI CHARGE-BASED COMPACT MODELLING OF JUNCTIONLESS NANOWIRE TRANSISTOR WITH STRAIN FOR LOW POWER DIGITAL LOGIC CIRCUIT CO-SUPERVISOR PHD ON GOING |
| 2 |
MUHAMMAD FARIS BIN MD NOOR DESIGN OF STT-MRAM USING VERTICAL GATE-ALL-AROUND NANOWIRE ACCESS TRANSISTOR CO-SUPERVISOR PHD ON GOING |
| 3 |
MATHANGI R DESIGN AND OPTIMIZATION OF JUNCTIONLESS FINFET ELECTRICAL CHARACTERISTICS WITH GAUSSIAN DOPED CHANNEL CO-SUPERVISOR MASTER ON GOING |